
              MOTOROLA PLANS TO SAMPLE THE 68060 NEXT QUARTER

                        Computergram International

        Motorola Inc finally launched the long-promised 68060 follow
n to the  68040,  claiming that it  matches the  performance of the  Intel
Corp  Pentium at less than half the price - it costs $263 at 50MHz when you
rder  10,000  or  more  and  will sample next month. It is also claimed to
deliver  twice  the  performance  of the 68040 at the same clock speed, the
extra  speed  being  achieved  by  use  of  a  superscalar design with dual
four-stage  integer  pipelines.  That  means that the chip has two complete
integer  arithmetic-logic  units  side by side, with the instruction stream
being  split  into  two  and the two halves being executed in parallel. The
part  is claimed to deliver 100 MIPS peak at 50MHz - a figure arrived at by
simple  arithmetic;  it  is  a  peak  performance  because  at  times,  one
instruction  stream will be halted while it waits for an answer it needs to
come  out  of  the  other side. It includes 8Kb instruction cache, 8Kb data
cache and 256-entry branch cache. It comes in 50MHz and 66MHz versions runs
ff  a  3.3V  power  supply where the 68040 requires 5V, and with the 68000
family out of favour as a CPU these days, it is aimed primarily at embedded
applications  that  require  high-speed  computation, input-output and data
movement   performance,   such   as  communications  and  graphics-oriented
applications   -   high-speed  printing,  image  processing  and  real-time
simulation.  There are also cheaper 68LC060 and 68EC060 variants of the new
part,  which  omit  the memory manager, and both the memory manager and the
floating point unit; they cost $169 and $150 respectively for 10,000-up.

***************************************************************************

                   _The_Motorola_Developer's_Newsletter_
                  ESC Special Edition, Volume 2, Issue 2.

ISI's S68060-1-A Provides Seamless, Inexpensive Data Migration to
68060 Processors

By: Luke Chang, EE
    Interconnect Systems, Inc.

As many users of Motorola's 68040 processors contemplate
transitioning their designs to the new 68060, they seek a
seamless migration path that avoids painful investments in new
hardware.  Interconnect Systems Inc. (ISI), of Simi Valley,
California, has developed a fast, inexpensive upgrade path with
its S68060-1-A upgrade module.  This module supports a broad
range of applications and markets ranging from system upgrades in
the embedded systems market, to microprocessor upgrades in the
personal computer market.  ISI designed the upgrade in the form
f a "smart" PGA socket which contains the voltage regulator,
logic conversion, and optional clock-doubling circuitry needed to
accomplish the seamless migration.

The 68060 is the latest superscalar 32-bit microprocessor in the
68000 Family.  It has two ALU pipelines, dual on-chip cache, and
an integral FPU.  Initially, it will clock at 50 MHz, and
requires a 3.3V power supply versus the 5V supply on the 68040.
The 68060 has several features which make designing an upgrade
module possible.  First, the 68060, with a 223 pin (18x18 matrix)
Pin Grid Array (PGA) footprint is a "super socket" version of the
179 pin (18x18 matrix) used for the 68040.  Most of the signal,
power, and ground pins have the same location on the 68060 as are
found on the 68040.  Second, both chips have the same 32-bit data
bus.  This means that bus size conversion through external logic
and associated circuitry are not necessary.

Despite the similarities between the 68060 and the 68040, there
are obviously some conversion problems which require external
circuitry.  As noted, the 68060 runs at 3.3V versus the 68040's
5V.  The upgrade module provides a solution to this problem by
using a voltage regulator to convert 5V power from the existing
68040 chip attach site on the system circuit board to the 3.3V
power needed by the 68060.

Another problem is timing.  The 68060 will be available at either
50 MHz or 66 MHz, twice the speed of relevant 68040 processors.
There are two solutions to this timing problem depending on the
actual system in which the upgrade module is interfaced.  The
first, and simpler, option is to use the MC88916 Phase Locked
Loop chip found in many 68040-based systems.  The design of the
MC88916 makes it possible to get a clock-doubled signal from this
chip and feed it to the 68060.  There are, however, disadvantages
to this solution.  The maximum frequency obtained is limited to
66 MHz by the 88916.  When faster versions of the 68060 are
available, this solution will not work.  In addition, the 88916
is dependent on the RESET function on the 68040.  This means some
external logic is required to upgrade to the 68060.

An alternative solution to the timing problem is to use an
MC88915 Phase Locked Loop clock chip.  The 88915 can run at very
high speeds, up to 133 MHz, and is not dependent on the 68040
RESET pin.  The downside to this solution is high price--the
88915 is a relatively expensive chip.  And, in 68040 systems
which already have the 88916, the 88915 will not be utilized.

The 68060 upgrade module which ISI has built, P/N S68060-1-A, is
designed to work with either of the timing solutions outlined.
If the 88915-based solution is employed, ISI's module is easily
modified by disconnecting a trace on one of the circuit boards.
Additional components are included in the module with this
version.

The 68060 also accesses some signals from the bus at different
times than the 68040 microprocessor due to the timing of the skew
clock.  Some signals are triggered at the rising edge rather than
the falling edge, and the 68060 does not support the bus snooping
mode of the 68040.  Therefore, the 68060 upgrade module has a
third "sub-circuit" containing a Programmable Logic Array (PAL)
chip to solve timing problems.

Mechanically, the S68060-1-A upgrade module consists of two
stacked PGA sockets which are fixed in place with two levels of
interconnect circuitry and components nested in the sockets.  The
module is identical in size to the 68040 and 68060 PGA package in
the horizontal (x,y) dimensions, with a stack height of
approximately .300".  The top of the module is a Low Insertion
Force (LIF) PGA socket which accepts the 68060 processor.  The
bottom of the module is an array of PGA pins which match the
footprint of the 68040.  These pins can be soldered directly into
the 68040 system board or inserted into a socket on this board.

The S68060-1-A upgrade module is designed for a wide range of
applications, from system characterization and test, and system
upgrade in the embedded market, to microprocessors in the
personal computer market.  In all cases, the main purpose of the
product is to make a "seamless" transition from the 68040 to the
68060.



_The_Motorola_Developer's_Newsletter_ is published quarterly by
the High Performance Microprocessor Division of Motorola.  If you
have comments or questions concerning this newsletter, or if you
need to make an address change or addition, FAX us at (512)
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 _The_Developer's_Newsletter_
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 For article submissions please contact: Fred Stotz (512) 891-2668
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Company and product names that appear in this publication are for
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registered trademarks of Motorola.  Although every attempt is
made to ensure the accuracy of this publications's contents,
Motorola and the authors assume no responsibility or liability
for any action caused directly or indirectly by information
contained in this publication.




                      from 6 8 0 6 0
side view:  ================================== (top interconnect)
            ||||||||||||||||||||||||||||||||||<-- pins
            ================================== (bottom
            ||||||||||||||||||||||||||||||||||  interconnect)
            ||||||||||||||||||||||||||||||||||<-- pins
            To 6 8 0 4 0 socket on motherboard


top view:    ________________________________ 

            |                                |  A, C both have
            |        p i n  h o l e s        |    "227 6V" w/
            |                                |    their top
            |       __________________       |    portion white
            |      | ===   ____   === |      |
            |      | |A|  |    |  |C| |      |  B looks like a
            |      | |_|  | B  |  |_| |      |    DIP switch w/
            |      |   ___|____|___   |      |    4 switches
            |      |  |     D      |  |      |
            |      |  |____________|  |      |  D is an IC
            |      |__________________|      |
            |                                |  Smaller surface-
            |                                |    mounted stuff
            |                                |    also appear.
            |________________________________|


