            *** CARTRIDGE PORT INTERFACE -- April 14, 1987 ***


A b s t r a c t

The Atari ST's  128 Kbyte read-only cartridge port can be transformed into 
a 64 Kbyte read/write port by using this circuit.  Writing to this port is 
slower than reading it by a factor of two, approximately. It can be writ -
ten to at a speed of 76 Kilowords per second.

This interface can be built by using only three chips,  two AS-TTLs  and a
PAL -- a total parts cost of less than $15.


H o w   I t   w o r k s


1.   B a c k g r o u n d   I n f o r m a t i o n

The ST brings out 15 address lines (A1-A15), 16 data lines (d0-D15)  /LDS,
[*] /UDS, /AS, /ROM4 and /ROM3.

Of these signals, /UDS, /LDS, and /AS have the same meaning as they do for
a 68000 CPU. A1-A15 are the least significant 15 address lines. D0-D15 are
connected internally  to the ST's data-bus.  /ROM3 and /ROM4 are generated
by the MMU, and are output signals, which tell the external hardware which
of the two banks  is being  addressed.  /ROM4 is activated when  the 68000
tries to read address 0xfa0000-0xfaffff. /ROM3 is activated when the 68000
tries to read address 0xfb0000-0xfbffff (note that the names of these sig-
nals are counterintuitive; ie. they have been correctly written above).


2.   C a v e a t s

Any and all hardware  connected to this modified port must be fast -- fast
enough to run with no wait-states and fast enough to tolerate the decoding
delays introduced by this circuit. I've used 200ns static RAM chips with -
out any trouble.

It is advisable to use /ROM4  to time any external hardware you build  (in
preference to /AS), since /ROM4 contains the necessary delay to ensure the
addresses are stable when it is activated. (At least this is what I assu -
med, and it worked.)

The data for write operations is produced by the two AS-TTL latches[*] u -
sed in the circuit (see below.)
        
[*] A preceeding slash indicates an active-low signal


3.   O p e r a t i n g   P r i n c i p l e

3.1. The PAL contains an asynchronous finite state machine. When the upper
     bank (address 0xfbxxxx) is read, the PAL manufactures an A0 (based on
     the state of /UDS and /LDS) and supplies this to U1. At the end of
     the read cycle, U1 and U2 are clocked to latch the least significant
     16 address bits into the PAL.

3.2. Subsequently,  when the lower bank is read  (address  0xfaxxxx),  the
     latched address (which was latched in step 1) is supplied as data and
     /PWE (the write-enable signal) is activated (it goes low). /ROM4 ac -
     tive should tell the external hardware that it is being addressed and
     /PWE active should tell it that this is a write-cycle. As an interes-
     ting  side-effect of this design,  the data word written out is  read
     back by the 68000 (you can use this fact to debug the interface!).

3.3. Reads to the upper bank will return garbage, unless some ROM is pre -
     sent there. Multiple successive reads to this bank will not be harm -
     ful (ie. they will not confuse the state-machine) and the latest a  -
     dress will be latched preparation for a read to the lower bank.

     Note that if you put RAM in the upper-bank,  you will not be able  to
     write to it. Connecting the /PWE line to such RAM will have no effect
     Putting a ROM  in this address space  should not create  any problems 
     (although I haven't tried this).

Example:  To write data  0xcd01 to address  0x3bc0 in the lower bank,  the
          following steps are performed.

          step1.  read byte at address 0xfbcd01   (0xfb0000+data)
          step2.  read word to address 0xfa3bc0   (0xfa0000+addr)
                                                                 
          [*]  I used AS374s, you can use AS or FAST. High speed chips are
               necessary so that delays from /OE  (latch output-enable) to
               valid data are  not critical.  You could possibly  get away
               with ALSTTL, but I haven't tried this.


C o n s t r u c t i o n

The schematic should help in this department.  Constructing this gadget is
easy and cheap.  The hardest part might be trying to find a connector  for
this port. You can get one from:

Douglas Electronics,
718 Marina Blvd.,
SAN LEANDRO, Calif. 94577

1-415-483-8770

(part number 33-DE-40. $10.00 per piece)

[*]  Another problem you might face is getting the PAL programmed.  If you
     don't know of a way to get the PAL programmed, you could use discrete
     logic chips to build the state machine.


4. B u i l d i n g   i t

The pin-outs given in the User's guide are CORRECT.  The pin-outs given in
the "Internals" book are WRONG. Follow the schematic. You can get the pin-
-outs for the '374s from an ASTTL or FAST databook. The PAL16L8's pin-outs
are given below.

--- (Read SCHMATIC.PI3) ---

[*]  You guessed it -- I'm not connected with D.E. although I and a number
     of others have purchased these connectors from them.


     PAL PINOUTS


Legend:

A preceding slash implies an active-low signal.
NC implies no-contact (nothing should be connected to these pins.)
(i) indicates that the signal is an input.
(o) indicates that the signal is an output.
(A) implies that the signal comes from/goes to the Atari cart. port.
(u1) implies that the signal goes to U1, the least-significant latch.
(u2) implies that the signal goes to U2, the most-significant latch.
(ex) implies that the signal goes to any external hardware connected, such
     as a ram-disk.

pin #   signal                  pin #  signal
-----   -----------             -----  ------

1       /UDS  (i, A)            11     NC (no contact)
2       /LDS  (i, A)            12     /OE (o, U1, U2)
3       /ROM4 (i, A)            13     A0 (o, U1)
4       /ROM3 (i, A)            14     /PWE (o, ex)
5       NC                      15     NC
6       NC                      16     /dclk (o, U1,U2)
7       NC                      17     NC
8       NC                      18     NC
9       NC                      19     NC
10      gnd    (A)              20     Vcc (A)

Note that the line called "help" is shown as "NC" since it is to be left
unconnected.

ALL THE BEST!!

Anees Munshi.
58 York Road
WESTON, Ontario M9R 3E6 (Canada)
Ph.: (416) 241-2166
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